Thursday, May 14, 2020

[Solved] How to draw the small-signal model of PMOS transistor?


PMOS SYMBOL


Small signal model of PMOS can be a nightmare for students and new analog designer. But in reality PMOS small signal model is identical to that of NMOS. 

Figure below explains the rearrangement of the model to obtain a model identical to NMOS small signal model.













In the rearranged model it can be seen that the current direction in PMOS is the same as that in NMOS: from drain to the source with the same amplitude of gmVGS

Thursday, May 7, 2020

DRC, LVS, and PEX in Cadence

Post layout simulation needs DRC, LVS and Parasitic Extraction. This video is a step-by-step guide to post-layout simulations.


Analog Layout Basics in Cadence

Hand-crafting analog circuits layout in Cadence. 

Circuit Testbench in Cadence

Creating testbench to characterise circuits in cadence Virtuoso

Analog Circuit Schematic Design in Cadence


This video gives the step-by-step process of creating a common source amplifier circuit schematic and symbol in Cadence.

[Solved] How to draw the small-signal model of PMOS transistor?

Small signal model of PMOS can be a nightmare for students and new analog designer. But in reality PMOS small signal model is identi...